INA117AM datasheet(6/17 Pages) TI1

6 / 17 page

INA117

SBOS154A

APPLICATION INFORMATION

Figure 1 shows the basic connections required for operation.

Applications with noisy or high-impedance power-supply lines

may require decoupling capacitors close to the device pins.

The output voltage is equal to the differential input volt-

age between pins 2 and 3. The common mode input

voltage is rejected.

Internal circuitry connected to the compensation pin 8 can-

cels the parasitic distributed capacitance between the feed-

back resistor, R2, and the IC substrate. For specified dy-

namic performance, pin 8 should be grounded or connected

through a 0.1

µF capacitor to an AC ground such as V+.

COMMON-MODE REJECTION

Common-mode rejection (CMR) of the INA117 is depend-

ent on the input resistor network, which is laser-trimmed for

accurate ratio matching. To maintain high CMR, it is impor-

tant to have low source impedances driving the two inputs.

A 75

Ω resistance in series with pin 2 or 3 will decrease CMR

from 86dB to 72dB.

Resistance in series with the reference pins will also degrade

CMR. A 4

Ω resistance in series with pin 1 or 5 will decrease

CMRR from 86dB to 72dB.

Most applications do not require trimming. Figures 2 and 3

show optional circuits that may be used for trimming offset

voltage and common-mode rejection.

TRANSFER FUNCTION

Most applications use the INA117 as a simple unity-gain

difference amplifier. The transfer function is:

VO = V3 – V2

V3 and V2 are the voltages at pins 3 and 2.

FIGURE 1. Basic Power and Signal Connections.

380k

Ω

380k

Ω

380k

Ω

21.1k

Ω

20k

Ω

–15V

+15V

1µF

Tantalum

1µF

Tantalum

–In = V

+In = V

O = V3 – V2

380k

Ω

380k

Ω

380k

Ω

21.1k

Ω

20k

Ω

V–

V+

O = V3 – V2

100k

Ω

50k

Ω

±1.5mV

Range

–15V

+15V

380k

Ω

380k

Ω

380k

Ω

21.1k

Ω

20k

Ω

V–

V+

V = V – V

10k

Ω

±10mV

100

Ω

100

Ω

V+

V–

100µA

1/2 REF200

100µA

1/2 REF200

OPA27

Offset adjustment is regulated—

insensitive to power supply variations.

(a)

(b)

FIGURE 2. Offset Voltage Trim Circuits.

Some applications, however, apply voltages to the reference

terminals (pins 1 and 5). A more complete transfer function

is:

VO = V3 – V2 + 19 • V5 – 18 • V1

V5 and V1 are the voltages at pins 5 and 1.

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