DS90CP22

SNLS053E – MARCH 2000 – REVISED APRIL 2013

www.ti.com

Figure 2. Diff. Output Eye-Pattern in 1:2 split mode @ 800 Mbps

−1 data pattern,

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2)

−0.3V to +4V

CMOS/TTL Input Voltage (EN0, EN1, SEL0, SEL1)

LVDS Receiver Input Voltage (IN+, IN

−)

−0.3V to +4V

LVDS Driver Output Voltage (OUT+, OUT

−)

−0.3V to +4V

LVDS Output Short Circuit Current

Continuous

Junction Temperature

+150°C

Storage Temperature Range

−65°C to +150°C

Lead Temperature (Soldering, 4 sec.)

+260°C

Maximum Package Power Dissipation at

16L SOIC

1.435 W

25°C

16L SOIC Package Derating

11.48 mW/°C above +25°C

16L TSSOP

0.866 W

16L TSSOP Package Derating

9.6 mW/°C above +25°C

ESD Rating

(HBM, 1.5k

Ω, 100pF)

> 5 kV

(EIAJ, 0

Ω, 200pF)

> 250 V

(1)

If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and

specifications.

(2)

“Absolute Maximum Ratings” are these beyond which the safety of the device cannot be verified. They are not meant to imply that the

device should be operated at these limits. “Electrical Characteristics” provides conditions for actual device operation.

Recommended Operating Conditions

Min

Typ

Max

Units

3.0

3.3

3.6

V

Receiver Input Voltage

0

V

Operating Free Air Temperature

-40

+25

+85

°C

2

Submit Documentation Feedback

Copyright © 2000–2013, Texas Instruments Incorporated

Product Folder Links: DS90CP22