IC-MR datasheet(6/44 Pages) ICHAUS

6 / 44 page

preliminary

iC-MR 13-BIT S&H SIN/COS

INTERPOLATOR WITH CONTROLLER INTERFACES

Rev A1, Page 6/44

ELECTRICAL CHARACTERISTICS

Operating conditions:

VDDA = VDD = 4.5...5.5 V, GNDA = GND = 0 V, IBP calibrated to 200 µA, Tj = -40...125 °C, unless otherwise noted.

Item

Symbol

Parameter

Conditions

Unit

No.

Min.

Typ.

Max.

General

001

VDDA,

VDD

Permissible Supply Voltage

4.5

5.5

002

I(VDDA)

VDDA Supply Current

003

I(VDD)

VDD Supply Current

004

Vc()hi

Clamp Voltage hi

at digital inputs ASLI, SLI, MAI,

NCS, NL, NRD, NWR, NRES,

NERR, SDA, SCL, TMS

Vc()hi = V() - V(VDD),

0.3

1.2

I() = 4 mA

005

Vc()hi

Clamp Voltage hi

at digital inputs D(7...0)

Vc()hi = V() - V(VDD),

0.3

1.2

I() = 1.6 mA

006

Vcz()hi

Clamp Voltage hi

at ACO, VDDA, PSO, NSO, PCO,

NCO, AMAO, SLO, ADC, PSI,

NSI, VREF, PCI, NCI

I() = 4 mA

007

Vc()lo

Clamp Voltage lo

at ACO, VDDA, PSO, NSO, PCO,

NCO, AMAO, SLO, ADC, PSI,

NSI, VREF, PCI, NCI

I() = -4 mA

-1.2

-0.3

Bias Current Source, Reference Voltages, Input/Output VREF

101

IBP

Bias Current Source

IBP calibrated to 200 µA

92.5

100

107.5

102

VPAH

Reference Voltage VPAH

referenced to GNDA

%VDDA

103

V05

Reference Voltage V05

450

500

550

104

VREFI

Internal Ref. Voltage VREFI

DCPOS = 1

1.35

1.5

1.65

DCPOS = 0

2.25

2.5

2.75

105

Vin()

Permissible Input Voltage at

VREF

SELREF = 0x3

0.5

VDDA

− 2

106

Rin()

Input Resistance at VREF

SELREF = 0x3, REFVOS = 0x3, UIN = 1,

TUIN = 0, Rin() referenced to VREFin()

kΩ

107

Vref()out

Output Voltage at VREF

SELREF = 0x2, I() = 0

100

%VREFI

108

I0()

Leakage Current at VREF

SELREF = 0x0 or 0x1

-1

µA

12-bit A/D Converter, Measuring Input ADC

601

RESOadc

A/D Converter Resolution

bit

602

t()adc

A/D Conversion Time

1.1

603

Vin()FS

Maximum Full Scale Input

Voltage

ADCSLOP = 0xFF

2.5

ADCSLOP = 0x00

2.0

604

INL()

A/D Conversion Nonlinearity

±0.95

LSB

Signal Conditioning, Inputs: PSI, NSI, PCI, NCI

701

Vin()sig

Permissible V Mode Input Voltage UIN = 1, TUIN = 0

0.75

VDDA

− 1.5

UIN = 1, TUIN = 1, DCPOS = 1

-0.1

VDDA

+ 0.1

702

Iin()

V Mode Input Current

UIN = 1, TUIN = 0

-100

100

703

Rin()

V Mode Input Resistance

UIN = 1, TUIN = 1, vs. VREFin, Tj = 27 °C,

16.4

23.6

kΩ

704

Iin()sig

Permissible I Mode Input Current UIN = 0, DCPOS = 0

-300

-10

µA

UIN = 0, DCPOS = 1

300

µA

705

CTR()sig

Permissible Signal Contrast Ratio current ratio of Iin()pkpk vs. Iin()dc

0.125

706

Rin()

I Mode Input Resistance

Tj = 27 °C, vs. VREFin;

UIN = 0, RIN = 00

1.1

1.6

2.1

kΩ

UIN = 0, RIN = 01

1.6

2.3

3.0

kΩ

UIN = 0, RIN = 10

2.2

3.2

4.2

kΩ

UIN = 0, RIN = 11

3.2

4.6

6.0

kΩ

707

TC(Rin)

Temperature Coefﬁcient of Rin

0.15

%/K

708

Vin()os

Offset Voltage of Input Stage

referenced to side of input;

GR = 0x4, GFC = 0x1F, GFS = 0x7C0

300

µV

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