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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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PIC18F4550ESOSQTP Scheda tecnica(PDF) 16 Page - Microchip Technology |
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PIC18F4550ESOSQTP Scheda tecnica(HTML) 16 Page - Microchip Technology |
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16 / 430 page  PIC18F2455/2550/4455/4550 DS39632D-page 14 Preliminary © 2007 Microchip Technology Inc. PORTB is a bidirectional I/O port. PORTB can be software programmed for internal weak pull-ups on all inputs. RB0/AN12/INT0/FLT0/ SDI/SDA RB0 AN12 INT0 FLT0 SDI SDA 21 I/O I I I I I/O TTL Analog ST ST ST ST Digital I/O. Analog input 12. External interrupt 0. PWM Fault input (CCP1 module). SPI data in. I2C™ data I/O. RB1/AN10/INT1/SCK/ SCL RB1 AN10 INT1 SCK SCL 22 I/O I I I/O I/O TTL Analog ST ST ST Digital I/O. Analog input 10. External interrupt 1. Synchronous serial clock input/output for SPI mode. Synchronous serial clock input/output for I2C mode. RB2/AN8/INT2/VMO RB2 AN8 INT2 VMO 23 I/O I I O TTL Analog ST — Digital I/O. Analog input 8. External interrupt 2. External USB transceiver VMO output. RB3/AN9/CCP2/VPO RB3 AN9 CCP2(1) VPO 24 I/O I I/O O TTL Analog ST — Digital I/O. Analog input 9. Capture 2 input/Compare 2 output/PWM 2 output. External USB transceiver VPO output. RB4/AN11/KBI0 RB4 AN11 KBI0 25 I/O I I TTL Analog TTL Digital I/O. Analog input 11. Interrupt-on-change pin. RB5/KBI1/PGM RB5 KBI1 PGM 26 I/O I I/O TTL TTL ST Digital I/O. Interrupt-on-change pin. Low-Voltage ICSP™ Programming enable pin. RB6/KBI2/PGC RB6 KBI2 PGC 27 I/O I I/O TTL TTL ST Digital I/O. Interrupt-on-change pin. In-Circuit Debugger and ICSP programming clock pin. RB7/KBI3/PGD RB7 KBI3 PGD 28 I/O I I/O TTL TTL ST Digital I/O. Interrupt-on-change pin. In-Circuit Debugger and ICSP programming data pin. TABLE 1-2: PIC18F2455/2550 PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Name Pin Number Pin Type Buffer Type Description PDIP, SOIC Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output ST = Schmitt Trigger input with CMOS levels I = Input O = Output P = Power Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared. 2: Default assignment for CCP2 when CCP2MX Configuration bit is set. |
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