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STM32F205RB Scheda tecnica(PDF) 107 Page - STMicroelectronics |
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STM32F205RB Scheda tecnica(HTML) 107 Page - STMicroelectronics |
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107 / 163 page ![]() STM32F205xx, STM32F207xx Electrical characteristics Doc ID 15818 Rev 7 107/163 Figure 46. Ethernet SMI timing diagram Table 59 gives the list of Ethernet MAC signals for the RMII and Figure 47 shows the corresponding timing diagram. Figure 47. Ethernet RMII timing diagram Table 58. Dynamics characteristics: Ethernet MAC signals for SMI(1) 1. TBD stands for “to be defined”. Symbol Rating Min Typ Max Unit tMDC MDC cycle time (1.71 MHz, AHB = 72 MHz) TBD TBD TBD ns td(MDIO) MDIO write data valid time TBD TBD TBD ns tsu(MDIO) Read data setup time TBD TBD TBD ns th(MDIO) Read data hold time TBD TBD TBD ns Table 59. Dynamics characteristics: Ethernet MAC signals for RMII(1) 1. TBD stands for “to be defined”. Symbol Rating Min Typ Max Unit tsu(RXD) Receive data setup time TBD TBD TBD ns tih(RXD) Receive data hold time TBD TBD TBD ns tsu(CRS) Carrier sense set-up time TBD TBD TBD ns tih(CRS) Carrier sense hold time TBD TBD TBD ns td(TXEN) Transmit enable valid delay time 0 9.6 21.9 ns td(TXD) Transmit data valid delay time 0 9.9 21 ns ETH_MDC ETH_MDIO(O) ETH_MDIO(I) tMDC td(MDIO) tsu(MDIO) th(MDIO) ai15666c RMII_REF_CLK RMII_TX_EN RMII_TXD[1:0] RMII_RXD[1:0] RMII_CRS_DV td(TXEN) td(TXD) tsu(RXD) tsu(CRS) tih(RXD) tih(CRS) ai15667 |
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