64GA106 datasheet(23/330 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

DS39905E-page 23

PIC24FJ256GA110 FAMILY

2.0

GUIDELINES FOR GETTING

STARTED WITH 16-BIT

MICROCONTROLLERS

2.1

Basic Connection Requirements

Getting started with the PIC24FJ256GA110 family

family of 16-bit microcontrollers requires attention to a

minimal set of device pin connections before

proceeding with development.

The following pins must always be connected:

•All VDD and VSS pins

(see Section 2.2 “Power Supply Pins”)

•All AVDD and AVSS pins, regardless of whether or

not the analog device features are used

(see Section 2.2 “Power Supply Pins”)

•MCLR pin

(see Section 2.3 “Master Clear (MCLR) Pin”)

• ENVREG/DISVREG and VCAP/VDDCORE pins

(PIC24F J devices only)

(see Section 2.4 “Voltage Regulator Pins

(ENVREG/DISVREG and VCAP/VDDCORE)”

)

These pins must also be connected if they are being

used in the end application:

• PGECx/PGEDx pins used for In-Circuit Serial

Programming™ (ICSP™) and debugging purposes

(see Section 2.5 “ICSP Pins”)

• OSCI and OSCO pins when an external oscillator

source is used

(see Section 2.6 “External Oscillator Pins”)

Additionally, the following pins may be required:

•VREF+/VREF- pins used when external voltage

reference for analog modules is implemented

The minimum mandatory connections are shown in

Figure 2-1.

FIGURE 2-1:

RECOMMENDED

MINIMUM CONNECTIONS

Note:

The AVDD and AVSS pins must always be

connected, regardless of whether any of

the analog modules are being used.

PIC24FJXXXX

VDD

VSS

VDD

MCLR

VCAP/VDDCORE

(EN/DIS)VREG

(1)

C2(2)

C3(2)

C4(2)

C5(2)

C6(2)

Key (all values are recommendations):

C1 through C6: 0.1

F, 20V ceramic

C7: 10

F, 6.3V or greater, tantalum or ceramic

R1: 10 kΩ

R2: 100Ω to 470Ω

Note

See Section 2.4 “Voltage Regulator Pins

(ENVREG/DISVREG and VCAP/VDDCORE)”

for explanation of ENVREG/DISVREG pin

connections.

The example shown is for a PIC24F device

with five VDD/VSS and AVDD/AVSS pairs.

Other devices may have more or less pairs;

adjust the number of decoupling capacitors

appropriately.

(1)

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