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TSL2581 Scheda tecnica(PDF) 6 Page - ams AG |
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TSL2581 Scheda tecnica(HTML) 6 Page - ams AG |
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6 / 35 page ![]() TSL2580, TSL2581 LIGHT-TO-DIGITAL CONVERTER TAOS098 − MARCH 2010 5 The LUMENOLOGY r Company r r Copyright E 2010, TAOS Inc. www.taosinc.com AC Electrical Characteristics, VDD = 3 V, TA = 255C (unless otherwise noted) PARAMETER† TEST CONDITIONS MIN TYP MAX UNIT t(CONV) Conversion time 2.7 688 ms f Clock frequency (I2C only) 0 400 kHz f(SCL) Clock frequency (SMBus only) 10 100 kHz t(BUF) Bus free time between start and stop condition 1.3 μs t(HDSTA) Hold time after (repeated) start condition. After this period, the first clock is generated. 0.6 μs t(SUSTA) Repeated start condition setup time 0.6 μs t(SUSTO) Stop condition setup time 0.6 μs t(HDDAT) Data hold time 0 0.9 μs t(SUDAT) Data setup time 100 ns t(LOW) SCL clock low period 1.3 μs t(HIGH) SCL clock high period 0.6 μs t(TIMEOUT) Detect clock/data low timeout (SMBus only) 25 35 ms tF Clock/data fall time 300 ns tR Clock/data rise time 300 ns Ci Input pin capacitance 10 pF † Specified by design and characterization; not production tested. |
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