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U403 Scheda tecnica(PDF) 1 Page - Calogic, LLC |
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U403 Scheda tecnica(HTML) 1 Page - Calogic, LLC |
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1 / 2 page ![]() Dual N-Channel JFET Switch U401 – U406 FEATURES •• Minimum System Error and Calibration •• Low Drift With Temperature •• Operates From Low Power Supply Voltages •• High Output Impedance ABSOLUTE MAXIMUM RATINGS (TA = 25 oC unless otherwise specified) Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . . 50V Gate Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Storage Temperature Range . . . . . . . . . . . . . -65 oC to +200oC Operating Temperature Range . . . . . . . . . . . -55 oC to +150oC Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300 oC One Side Both Sides Power Dissipation (TA = 85 oC) 300mW 500mW Derate above 25 oC2.6mW/oC5mW/oC NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ORDERING INFORMATION Part Package Temperature Range U401-6 Hermetic TO-71 -55 oC to +150oC XU401-6 Sorted Chips in Carriers -55 oC to +150oC CORPORATION PIN CONFIGURATION S2 G1 D2 D1 G2 S1 TO-71 CJ2 |
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