MX25L3239E datasheet(6/92 Pages) MCNIX

6 / 92 page

MX25L3239E

P/N: PM1840

REV. 1.3, NOV. 11, 2013

2. GENERAL DESCRIPTION

MX25L3239E is 32Mb bits serial Flash memory, which is configured as 4,194,304 x 8 internally. When it is in four

I/O mode, the structure becomes 8,388,608 bits x 4. MX25L3239E feature a serial peripheral interface and soft-

ware protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are

a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is ena-

bled by CS# input.

MX25L3239E, MXSMIO® (Serial Multi I/O) flash memory, provides sequential read operation on whole chip and

multi-I/O features.

When it is in quad I/O mode, the SI pin, SO pin, WP# pin and HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin

and SIO3 pin for address/dummy bits input and data Input/Output.

After program/erase command is issued, auto program/erase algorithms which program/erase and verify the

specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256

bytes) basis, and erase command is executed on sector (4K-byte), block (32K-byte/64K-byte), or whole chip ba-

sis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status

read command can be issued to detect completion status of a program or erase operation via WIP bit.

When the device is not in operation and CS# is high, it is put in standby mode.

The MX25L3239E utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after

100,000 program and erase cycles.

Table 1. Additional Features

Numbers of Dummy Cycles

4 I/O

86*

104

Note: *means default status

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