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MX25U6435F Scheda tecnica(PDF) 21 Page - Macronix International

Il numero della parte MX25U6435F
Spiegazioni elettronici  1.8V 64M-BIT [x 1/x 2/x 4] CMOS MXSMIO짰 (SERIAL MULTI I/O) FLASH MEMORY
PDF  92 Pages
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Produttore elettronici  MCNIX [Macronix International]
Homepage  http://www.macronix.com
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MX25U6435F Scheda tecnica(HTML) 21 Page - Macronix International

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REV. 1.2, OCT. 23, 2013
MX25U6435F
P/N: PM1978
9-1. Write Enable (WREN)
The Write Enable (WREN) instruction is for setting Write Enable Latch (WEL) bit. For those instructions like PP, 4PP,
SE, BE32K, BE, CE, and WRSR, which are intended to change the device content WEL bit should be set every time
after the WREN instruction setting the WEL bit.
The sequence of issuing WREN instruction is: CS# goes low→sending WREN instruction code→ CS# goes high.
Both SPI (8 clocks) and QPI (2 clocks) command cycle can accept by this instruction. The SIO[3:1] are "don't care"
in SPI mode.
Figure 6. Write Enable (WREN) Sequence (SPI Mode)
2
1
34567
High-Z
0
06h
Command
SCLK
SI
CS#
SO
Mode 3
Mode 0
Figure 7. Write Enable (WREN) Sequence (QPI Mode)
SCLK
SIO[3:0]
CS#
06h
0
1
Command
Mode 3
Mode 0



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