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CS3750 Scheda tecnica(PDF) 3 Page - Cherry Semiconductor Corporation |
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CS3750 Scheda tecnica(HTML) 3 Page - Cherry Semiconductor Corporation |
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3 / 4 page ![]() 3 Package Pin Description PACKAGE PIN # PIN SYMBOL FUNCTION 16L PDIP (internally fused leads) 1 DIR1 CMOS compatible input pin controls direction of current through OUT1 2 C1 RC filter capacitor for OUT1 connected to Ground 3 IN1 CMOS compatible input pin controls output OUT1A and 1B 4,5,12,13 Gnd Ground connection 6 OUT1A One half of H-bridge output stage 1 7 VS1 Supply voltage 8 OUT1B One half of H-bridge output stage 1 9 OUT2B One half of H-bridge output stage 2 10 VS2 Supply voltage 11 OUT2A One half of H-bridge output stage 2 14 IN2 CMOS compatible input pin controls output OUT2A and 2B 15 C2 RC filter capacitor for OUT2 connected to Ground 16 DIR2 CMOS compatible input pin controls direction of current through OUT2 Each output stage contains 4 power NPN transistors arranged in a traditional H bridge configuration. Current flow through the two outputs (OUTxA, OUTxB) in each H-bridge is controlled by the logic signal DIRx. PWM input signals from the microprocessor, are filtered on chip and sent to the output stage. The duty cycle of the PWM signal is proportional to output voltage. The RC fil- ter reduces the noise of the PWM input signal by slowing its slew rate: i.e., the output signal is converted from a square wave to an exponential sawtooth waveform. An external capacitor (Cx) controls the slew rate for each H bridge. When the voltage on the control pin (INx) is low, both halves of the H bridge are off (Table 1). When INx is high, DIR controls the flow of current through the H-bridge. If DIRx=0, current flows from OUTxA out to the coil and back in through OUTxB. If DIRx=1, current flows from OUTxB out to the coil and back in through OUTxA. Table 1. Logic Control of H-Bridge The high side driver transistor in each H-bridge is current limited as a protection against a short circuit fault condi- tion. If an over voltage or a thermal runaway fault condi- tions occurs, all outputs shut down. Output Stage Motor Direction Control Protection Input Direction Outputs INX DIRX OUTxA OUTxB 0X 0 0 10 1 0 11 0 1 Circuit Description Application Diagram 1 IN1 C1 Gnd Gnd OUT1B VS1 DIR1 C2 Gnd Gnd OUT2A VS2 DIR2 *C1 COIL1 COIL2 Air Core Gauge Circular Speedometer *C2 * 0.047 mF VBAT OUT1A OUT2B IN2 |
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