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CDB4396 Scheda tecnica(PDF) 25 Page - Cirrus Logic |
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CDB4396 Scheda tecnica(HTML) 25 Page - Cirrus Logic |
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25 / 28 page ![]() CS4396 DS288PP1 25 LRCK SCLK Left Channel Right Channel SDATA +3 +2 +1 LSB +5 +4 MSB -1 -2 -3 -4 -5 +3 +2 +1 LSB +5 +4 MSB -1 -2 -3 -4 Figure 20. Format 0, Left Justified LRCK SCLK Left Channel Right Channel SDATA +3 +2 +1 LSB +5 +4 MSB -1 -2 -3 -4 -5 +3 +2 +1 LSB +5 +4 MSB -1 -2 -3 -4 Figure 21. Format 1, I2S LRCK SCLK Left Channel Right Channel SDATA 6543 210 98 7 15 14 13 12 11 10 6 543 210 98 7 15 14 13 12 11 10 32 clocks Figure 22. Format 2, Right Justified, 16-Bit Data LRCK SCLK Left Channel SDATA 65 4321 0 7 23 22 21 20 19 18 654321 0 7 23 22 21 20 19 18 32 clocks 0 Right Channel Figure 23. Format 3, Right Justified, 24-Bit Data |
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