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CS49310 Scheda tecnica(PDF) 50 Page - Cirrus Logic |
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CS49310 Scheda tecnica(HTML) 50 Page - Cirrus Logic |
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50 / 86 page ![]() CS49300 Family DSP 50 DS339PP4 one application code image residing in each 32 kilobyte page. Paging of the external memory is handled entirely by the host controller. The host controller should directly control all address bits outside of the memory space to be used by the DSP. As 32 kilobyte pages are desired to hold each application code, the DSP would need 15 bits for the address space. The system designer would connect the 15 address signals from the address latches while the host would directly control all address signals above 15 bits to page the memory accordingly. |
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