TS1220 datasheet(4/13 Pages) STMICROELECTRONICS

4 / 13 page

Characteristics

TN1215, TS1220, TYN612, TYN812, TYN1012

4/13

Doc ID 7475 Rev 7

Figure 3.

Average and D.C. on-state current

versus ambient temperature

(DPAK)

Figure 4.

Relative variation of thermal

impedance junction to case versus

pulse duration

100

125

0.0

0.5

1.0

1.5

2.0

2.5

3.0

(A)

T(AV)

(°C)

amb

α = 180°

D.C.

DPAK

Device mounted on FR4 with

recommended pad layout

1E-3

1E-2

1E-1

1E+0

0.1

0.2

0.5

1.0

K=[Z

th(j-c)

th(j-c)]

t (s)

Figure 5.

Relative variation of thermal

impedance junction to ambient

versus pulse duration (DPAK)

Figure 6.

Relative variation of gate trigger

and holding current versus junction

temperature for TS1220 series

1E-2

1E-1

1E+0

1E+1

1E+2

5E+2

0.01

0.10

1.00

K=[Z

th(j-a)

th(j-a)]

t (s)

DPAK

TO-220AB / IPAK

DPAK

Device mounted on FR4 with

recommended pad layout

-40

-20

100

120

140

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

T (°C)

I,I ,I [T ] /

GTHL

,I ,I [T =25°C]

GT H L

IGT

IH & I

= 1k

Figure 7.

Relative variation of gate trigger

and holding current versus junction

temperature

Figure 8.

Relative variation of holding

current versus gate-cathode

resistance (typical values)

-40

-20

100

120

140

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

2.4

I,I ,I [T ] /

GTHL

,I ,I [T =25°C]

GTHL

T (°C)

IGT

IH & IL

TN1215 and TYNx12 Series

1E-2

1E-1

1E+0

1E+1

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

R(k )

I [R

] / I [

=1k ]

HGK

RGK

Tj = 25°C

TS1220 Series

TS1220 Scheda tecnica(PDF) 4 Page - STMicroelectronics

TS1220 Scheda tecnica(HTML) 4 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13

Scheda tecnica Scarica

Link URL