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DS1321 Scheda tecnica(PDF) 3 Page - Dallas Semiconductor |
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DS1321 Scheda tecnica(HTML) 3 Page - Dallas Semiconductor |
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3 / 12 page ![]() DS1321 3 of 12 MEMORY CONFIGURATIONS The DS1321 can be configured via the MODE pin for three different arrangements of the four attached SRAMs. The state of the MODE pin is latched at VCCI = VCCTP on power up. See Figure 1 for details. MEMORY CONFIGURATIONS Figure 1 MODE = GND (4 BANKS WITH 1 SRAM EACH): MODE = VCCO (2 BANKS WITH 2 SRAM EACH): MODE FLOATING (1 BANK WITH 4 SRAMs): |
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