| Motore di ricerca datesheet componenti elettronici |
|
DS2480 Scheda tecnica(PDF) 3 Page - Dallas Semiconductor |
|
|
|||||||||||||||||||||||||||||
DS2480 Scheda tecnica(HTML) 3 Page - Dallas Semiconductor |
|
3 / 26 page ![]() DS2480 042498 3/26 DS2480 BLOCK DIAGRAM Figure 1 MUX CONFIGURATION REGISTER PROTOCOL ANALYZER PROTOCOL ANALYZER TIMING GENERATOR PROTOCOL CONVERTER 1–WIRE DRIVER MS BIT OF SPEED CONTROL (1 = RXD IS INVERTED) VPP 1–W RXD POL TXD DEVICE OPERATION The DS2480 can be described as a complex state machine with two static and several dynamic states. Two device–internal flags as well as functions assigned to certain bit positions in the command codes determine the behavior of the chip, as shown in the state transition diagram (Figure 2). The DS2480 requires and gener- ates a communication protocol of 8 data bits per charac- ter, 1 stop bit and no parity. It is permissible to use two stop bits on the TXD line. However, the DS2480 will only assert a single stop bit on RXD. When powering up, the DS2480 performs a master reset cycle and enters the Command Mode, which is one of the two static states. The device now expects to receive one 1–Wire reset command on the TXD line sent by the host at a data rate of 9600 bits per second (see section Communication Commands for details). This command byte is required solely for calibration of the timing generator the DS2480 and is not translated into any activity on the 1–Wire bus. After this first com- mand byte the device is ready to receive and execute any command as described later in this document. A master reset cycle can also be generated by means of software. This may be necessary if the host for any rea- son has lost synchronization with the device. The DS2480 will perform a master reset cycle equivalent to the power–on reset if it detects start polarity in place of the stop bit. The host has several options to generate this condition. These include making the UART gener- ate a break signal, sending a NULL character at a data rate of 4800 bps and sending any character with parity enabled and selecting space polarity for the parity bit. As with the power–on reset, the DS2480 requires a 1–Wire reset command sent by the host at a data rate of 9600 bps for calibration. |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |