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EM78P458AP Scheda tecnica(PDF) 10 Page - ELAN Microelectronics Corp |
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EM78P458AP Scheda tecnica(HTML) 10 Page - ELAN Microelectronics Corp |
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10 / 76 page ![]() EM78P458/459 OTP ROM Address PAGE registers IOC PAGE registers IOC PAGE registers 00 R0 (IAR) Reserve Reserve 01 R1 (TCC) Reserve Reserve 02 R2 (PC) Reserve Reserve 03 R3 (Status) Reserve Reserve 04 R4 RSR) Reserve Reserve 05 R5 (Port5) IOC50 (I/O Port Control Register) IOC51 (PWMCON) 06 R6 (Port6) IOC60 (I/O Port Control Register) IOC61 (DT1L) 07 R7 General Registers Reserve IOC71 (DT1H) 08 R8 General Registers Reserve IOC81 (PRD1) 09 R9 (ADCON) IOC90 (GCON) IOC91 (DT2L) 0A RA (ADDATA) IOCA0 (AD-CMPCON) IOCA1 (DT2H) 0B RB General Registers IOCB0 (Pull-down Control Register) IOCB1 (PRD2) 0C RC General Registers (Only two bits) IOCC0 (Open-drain Control Register) IOCC1 (DL1L) 0D RD General Registers IOCD0 (Pull-high Control Register) IOCD1 (DL1H) 0E RE General Registers (Only two bits) IOCE0 (WDT Control Register) IOCE1 (DL2L) 0F RF (Interrupt status) IOCF0 (Interrupt Mask Register) IOCF1 (DL2H) 10 ︰ 1F General Registers 20 ︰ 3F Bank 0 Bank 1 Fig. 4 Data Memory Configuration This specification is subject to change without prior notice. 06.25.2004 (V1.4) 10 |
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