AT45DB321E datasheet(22/73 Pages) ETC2

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AT45DB321E

8784F–DFLASH–11/2013

7.3.3

Read Sector Protection Register

To read the Sector Protection Register, an opcode of 32h and three dummy bytes must be clocked into the device. After

the last bit of the opcode and dummy bytes have been clocked in, any additional clock pulses on the SCK pin will result

in the Sector Protection Register contents being output on the SO pin. The first byte (byte location 0) corresponds to

Sector 0 (0a and 0b), the second byte corresponds to Sector 1, and the last byte (byte location 63) corresponds to Sector

63. Once the last byte of the Sector Protection Register has been clocked out, any additional clock pulses will result in

undefined data being output on the SO pin. The CS pin must be deasserted to terminate the Read Sector Protection

Table 7-8.

Read Sector Protection Register Command

Note:

1. XX = Dummy byte

Figure 7-6. Read Sector Protection Register

7.3.4

About the Sector Protection Register

The Sector Protection Register is subject to a limit of 10,000 erase/program cycles. Users are encouraged to carefully

evaluate the number of times the Sector Protection Register will be modified during the course of the application’s life

cycle. If the application requires that the Security Protection Register be modified more than the specified limit of 10,000

cycles because the application needs to temporarily unprotect individual sectors (sector protection remains enabled

while the Sector Protection Register is reprogrammed), then the application will need to limit this practice. Instead, a

combination of temporarily unprotecting individual sectors along with disabling sector protection completely will need to

be implemented by the application to ensure that the limit of 10,000 cycles is not exceeded.

Command

Byte 1

Byte 2

Byte 3

Byte 4

Read Sector Protection Register

32h

XXh

32h

Data

n + 1

Data

n + 63

Each transition represents eight bits

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