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ZXFV4583 Scheda tecnica(PDF) 3 Page - Diodes Incorporated |
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ZXFV4583 Scheda tecnica(HTML) 3 Page - Diodes Incorporated |
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3 / 14 page ![]() ZXFV4583 SEMICO NDUC TORS ISSUE 3 - NOVEMBER 2003 3 PARAMETER CONDITIONS TEST MIN TYP MAX UNIT AC Characteristics FILTIN function input voltage range PAL/NTSC P 0.5 2 V pk-pk Filter voltage gain FILTIN to FILOUT P 4.9 5.7 6.5 dB Filter attenuation 4.4MHz for PAL, 3.6MHz for NTSC P P 15 10 19 14 dB dB Slice level Vin = 1V pk-pk P 40 50 60 % CSYNC prop. Delay, tCS Relative to pin 4 input P 250 400 ns VSYNC delay C 250 ns VSYNC pulse width, tVSYNC (PAL) C 165 s VSYNC pulse width, tVSYNC (NTSC) C 195 s VSYNC default delay, tVSD P30 36 45 s HSYNC delay P 250 ns HSYNC pulse width, tHSYNC P 3.8 5 6.2 s BKPCH delay, tBD Relative to pin 4 input P 250 400 ns BKPCH pulse width, tB P 2.7 3.7 4.7 s ELECTRICAL CHARACTERISTICS (Cont.) VCC = 5V, RSET = 681k ,RFILT = 22k ,RNOSIG = 82k ,Tamb = 25 C unless otherwise stated. Note: In order to avoid coupling between high speed logic output signals and analog inputs, the test circuit layout uses connections from the logic output pins routed away from the analog pins. In the application, similar care in the layout is required, keeping resistors RFILT, RNOSIG and RSET close to their respective pins, in particular routing signal CSYNC away from pins 1, 2 and 12. |
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