Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

ZXFV4583 Scheda tecnica(PDF) 3 Page - Diodes Incorporated

Il numero della parte ZXFV4583
Spiegazioni elettronici  SYNC SEPARATOR WITH VARIABLE FILTER
PDF  14 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  DIODES [Diodes Incorporated]
Homepage  http://www.diodes.com
Logo DIODES - Diodes Incorporated

ZXFV4583 Scheda tecnica(HTML) 3 Page - Diodes Incorporated

  ZXFV4583 Datasheet HTML 1Page - Diodes Incorporated ZXFV4583 Datasheet HTML 2Page - Diodes Incorporated ZXFV4583 Datasheet HTML 3Page - Diodes Incorporated ZXFV4583 Datasheet HTML 4Page - Diodes Incorporated ZXFV4583 Datasheet HTML 5Page - Diodes Incorporated ZXFV4583 Datasheet HTML 6Page - Diodes Incorporated ZXFV4583 Datasheet HTML 7Page - Diodes Incorporated ZXFV4583 Datasheet HTML 8Page - Diodes Incorporated ZXFV4583 Datasheet HTML 9Page - Diodes Incorporated Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 14 page
background image
ZXFV4583
SEMICO NDUC TORS
ISSUE 3 - NOVEMBER 2003
3
PARAMETER
CONDITIONS
TEST MIN
TYP
MAX
UNIT
AC Characteristics
FILTIN function input voltage range
PAL/NTSC
P
0.5
2
V pk-pk
Filter voltage gain
FILTIN to FILOUT
P
4.9
5.7
6.5
dB
Filter attenuation
4.4MHz for PAL,
3.6MHz for NTSC
P
P
15
10
19
14
dB
dB
Slice level
Vin = 1V pk-pk
P
40
50
60
%
CSYNC prop. Delay, tCS
Relative to pin 4 input
P
250
400
ns
VSYNC delay
C
250
ns
VSYNC pulse width, tVSYNC (PAL)
C
165
s
VSYNC pulse width, tVSYNC (NTSC)
C
195
s
VSYNC default delay, tVSD
P30
36
45
s
HSYNC delay
P
250
ns
HSYNC pulse width, tHSYNC
P
3.8
5
6.2
s
BKPCH delay, tBD
Relative to pin 4 input
P
250
400
ns
BKPCH pulse width, tB
P
2.7
3.7
4.7
s
ELECTRICAL CHARACTERISTICS (Cont.)
VCC = 5V, RSET = 681k ,RFILT = 22k ,RNOSIG = 82k ,Tamb = 25 C unless otherwise stated.
Note:
In order to avoid coupling between high speed logic output signals and analog inputs, the test circuit
layout uses connections from the logic output pins routed away from the analog pins. In the application,
similar care in the layout is required, keeping resistors RFILT, RNOSIG and RSET close to their respective
pins, in particular routing signal CSYNC away from pins 1, 2 and 12.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com