5

FA5331P(M)/FA5332P(M)

s Description of each circuit

1. Oscillator section

This section outputs sawtooth waves oscillating between 0.15

and 3.55V using the capacitor charge and discharge

characteristics. Figure 1 shows how to connect the required

external components to this circuit. The oscillation frequency

curves. Pin 14 (SYNC) is a synchronizing input terminal

whose threshold voltage is about 1V. As Fig. 1 shows, input

rectangular synchronizing signal waves to pin 14 through an

RC circuit. Set the free-running frequency about 10% lower

than the synchronizing signal frequency. Connect a clamp

diode (D1) to prevent an unwanted current inside the IC.

2. Voltage error amplifier and overvoltage limiting circuit

The voltage error amplifier forms a voltage feedback loop to

keep the output voltage stable. The positive input terminal of

this amplifier is connected to the reference voltage (Vr). Fig. 2

shows how to connect the required external components to

this circuit.

The output voltage (Vo) is as follows:

............................................................................... (1)

FA5331: Vr=1.54V(typ.)

FA5332: Vr=1.55V(typ.)

Connect a resistor and a capacitor in parallel across error

amplifier output pin 5 and error amplifier negative input pin

6 to set the voltage gain (Av).

The Av value is as follows:

Av =

R4

R3 ( 1 + j

ω C1 • R4 )

............................... (2)

Error amplifier cutoff frequency (fc) is as follows:

fc =

1

2

π C1 • R4

................................................. (3)

If 100 or 120Hz ripples appear at the error amplifier output, the

active filter does not operate stably. To ensure stable

operation, set the fc value to about 1Hz.

An overvoltage detection comparator (C1) is built in to limit the

voltage if the output voltage exceeds the design value. The

reference input voltage (Vp) is as follows:

Vp =

α • Vr ............................................................. (4)

α =1.065

The connections shown in Fig. 2 limit the output voltage to

α

times the design value.

15

R

OSC

CT

RT

CT

D1

Csy

SYNC

13 REF

14

Fig. 1 Oscillator

6

R2

R1

Vo

MUL

5

R3

C1

Vr

R4

_

+

A1

F.F

Vp

4

C1

ER.AMP

OVP

Fig. 2 Voltage error amplifier and overvoltage limiting circuit

Vo =

R1 + R2

R1

• Vr