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MB40178 Scheda tecnica(PDF) 18 Page - fujitsu semiconductor |
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MB40178 Scheda tecnica(HTML) 18 Page - fujitsu semiconductor |
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18 / 21 page ![]() 18 MB40168/MB40178 s NOTES ON PCB LAYOUT Power Supply Lines The device’s power supply lines (VCCA, VCCD, AGND and DGND) should be laid out as analog lines and should be separated in so far as possible from other digital lines in order to reduce noise. Also the track widths of these lines should be as wide as possible to reduce parasitic impedance. Coupling Capacitors The device’s power supply lines VCCA and VCCD and the reference voltage pins VRIN, VREF, VRB, and VRT should be decoupled to analog ground by means of approx. 1 µF capacitors which should be placed as close as possible to these pins. Digital Output Load The load at the digital outputs should be kept as low as possible to prevent noise in the power supply lines caused by digital output switching. If, due to long wiring, the load becomes large then a buffer with small input capacitance should be inserted to reduce load capacitance. s OTHER NOTES ON OPERATION When using the D/A converter with its VRIN pin connected to the VREF pin, the A/D converter’s VRB pin must also be connected to the VREF because otherwise the internal reference voltage generation circuitry cannot output 3 V. When using the D/A converter with 8 bit resolution the DD9 (LSB) pin should be grounded. |
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