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PCF8562 Scheda tecnica(PDF) 28 Page - NXP Semiconductors |
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PCF8562 Scheda tecnica(HTML) 28 Page - NXP Semiconductors |
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28 / 44 page ![]() PCF8562 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 16 June 2011 28 of 43 NXP Semiconductors PCF8562 Universal LCD driver for low multiplex rates After the last command byte, one or more display data bytes may follow. Display data bytes are stored in the display RAM at the address specified by the data pointer and the subaddress counter. Both data pointer and subaddress counter are automatically updated. An acknowledgement, after each byte, is asserted only by the PCF8562s that are addressed via address lines A0, A1 and A2. After the last display byte, the I2C-bus master asserts a STOP condition (P). Alternately a START may be asserted to restart an I2C-bus access. |
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