HT48CA0 datasheet(14/36 Pages) HOLTEK

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Low voltage reset — LVR

The HT48CA0 provides low voltage reset circuit

in order to monitor the supply voltage of the

device. If the supply voltage of the device is

within the range 0.9V~2.2V, such as changing a

battery, the LVR will automatically reset the

device internally.

The LVR includes the following specifications:

• The low voltage (0.9V~2.2V) has to remain in

their original state to exceed 1 ms. If the low

voltage state does not exceed 1 ms, the LVR

will ignore it and do not perform a reset func-

tion.

• The LVR uses the “OR” function with the exter-

nal RES signal to perform chip reset.

• During HALT mode, if the LVR occurs, the

device will wake-up and the PD flag will be set

as “1”, the same as the external RES.

Be cause the operating voltage (VDD) is

2.2V~3.6V and the LVR operating voltage

(VLVR) is 0.9V~2.2V, therefore one margin volt-

age about 0.1V is needed for proper chip opera-

tion. The relationship between VDD and VLVR is

shown below.

Note: VOPR is the voltage range for proper chip

operation at 4MHz system clock.

Carrier

The HT48CA0 provides a carrier output which

shares the pin with PC0. It can be selected to be

a carrier output (REM) or level output pin (PC0)

by mask option. If the carrier output option is

selected, setting PC0=“0” to enable carrier out-

put and setting PC0=“1” to disable it at low

level output.

Low voltage reset

*1: To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024

system clock pulses before entering the normal operation.

*2: Since the low voltage has to maintain in its original state and exceed 1 ms, therefore 1 ms delay

is needed to enter the reset mode.

HT48CA0

23rd July ’98

HT48CA0 Scheda tecnica(PDF) 14 Page - Holtek Semiconductor Inc