GDC21D301A datasheet(23/35 Pages) HYNIX

23 / 35 page

GDC21D301A

STC1 (0x060 ~ 0x062)

STC1 Register 1 (0x060)

STC1 Register 2 (0x062)

These read-only registers hold the lower 20 bits of

STC value from the internal STC counter of the

GDC21D301A when the GDC21D301A retrieves

the PCR value from the transport packet whose

PID value is activated for decoding. The internal

STC counter is clocked at the frequency of

input

on CLOCK_27M pin (nominally 27 MHz). In the

GDC21D301A,

STC_Extension

written

STC1_2[15:7] and can be read by user. STC1 is

also read-only register.

Internal STC counter base

STC Extension

STC2 (0x064 ~ 0x066)

STC2 Register 1 (0x064)

STC2 Register 2 (0x066)

These read-only registers hold the lower 20 bits of

STC value from the internal STC counter of the

GDC21D301A when external BOF1 signal is

detected.

STC3 (0x068 ~ 0x06a)

STC3 Register 1 (0x068)

STC3 Register 2 (0x06a)

These read-only registers hold the lower 20 bits of

STC value from the internal STC counter of the

GDC21D301A when external BOF2 signal is

detected.

STC4 (0x06c ~ 0x06e)

STC4 Register 1 (0x06c)

STC4 Register 2 (0x06e)

These read-only registers hold the lower 20 bits of

STC value from the internal STC counter of the

GDC21D301A when external BOF3 signal is

detected.

STC5 (0x070 ~ 0x072)

STC5 Register 1 (0x070)

STC5 Register 2 (0x072)

These read-only registers hold the lower 20 bits of

STC value from the internal STC counter of the

GDC21D301A when STC fetch instruction is

activated(see Instruction Register).

STC1_2

STC1_1

GDC21D301A Scheda tecnica(PDF) 23 Page - Hynix Semiconductor

GDC21D301A Scheda tecnica(HTML) 23 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

Scheda tecnica Scarica

Link URL