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AV9172-03CC16 Scheda tecnica(PDF) 4 Page - Integrated Circuit Systems

Il numero della parte AV9172-03CC16
Spiegazioni elettronici  Low Skew Output Buffer
PDF  8 Pages
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Produttore elettronici  ICST [Integrated Circuit Systems]
Homepage  http://www.icst.com
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AV9172-03CC16 Scheda tecnica(HTML) 4 Page - Integrated Circuit Systems

  AV9172-03CC16 Datasheet HTML 1Page - Integrated Circuit Systems AV9172-03CC16 Datasheet HTML 2Page - Integrated Circuit Systems AV9172-03CC16 Datasheet HTML 3Page - Integrated Circuit Systems AV9172-03CC16 Datasheet HTML 4Page - Integrated Circuit Systems AV9172-03CC16 Datasheet HTML 5Page - Integrated Circuit Systems AV9172-03CC16 Datasheet HTML 6Page - Integrated Circuit Systems AV9172-03CC16 Datasheet HTML 7Page - Integrated Circuit Systems AV9172-03CC16 Datasheet HTML 8Page - Integrated Circuit Systems  
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AV9172
Pin Configuration
Functionality Table for AV9172-03
CLKIN Input Frequency=X, input range is 10 to 50 MHz.
Example Table for AV9172-03
(33 MHz input, all frequencies in MHz.)
Timing Diagram for AV9172-03
16-Pin SOIC or 16-Pin PDIP
Note: The phase alignment between the 1X clock outputs and
reference clocks input will be either at a 0 or 180 degrees
offset if the 2X clock is used as the feedback signal (con-
nected to the FBIN pin). Which relationship occurs is totally
random and has the potential to change any time the device has
its VDD supply cycled off or the devices input clock
removed.
EN2
INV#
Q0
Q1
Q2
Q3
Q4
Q5
0
0
2X
2X
2X
2X
2X
2X
1
0
2X
2X
2X
2X
2X
1X
0
1
2X
2X
2X
1X
1X
2X
1
1
2X
2X
2X
1X
1X
1X
EN2
INV#
Q0
Q1
Q2
Q3
Q4
Q5
0
0
66
66
66
66
66
66
1
0
66
66
66
66
66
33
0
1
66
66
66
33
33
66
1
1
66
66
66
33
33
33



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