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ICS552-01 Scheda tecnica(PDF) 3 Page - Integrated Circuit Systems |
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ICS552-01 Scheda tecnica(HTML) 3 Page - Integrated Circuit Systems |
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3 / 4 page ![]() ICS552-01A Crystal Oscillator & Multiplier with 8 Low Skew Outputs MDS 552-01 AB 3 Revision 032200 Printed 11/14/00 Integrated Circuit Systems • 525 Race Street • San Jose • CA • 95126 • (408) 295-9800tel • www.icst.com Parameter Conditions Minimum Typical Maximum Units ABSOLUTE MAXIMUM RATINGS (note 1) ABSOLUTE MAXIMUM RATINGS (note 1) Supply voltage, VDD Referenced to GND 7 V Inputs and Clock Outputs Referenced to GND -0.5 VDD+0.5 V Ambient Operating Temperature Commercial 0 70 °C Industrial -40 85 °C Soldering Temperature Max of 10 seconds 260 °C Storage temperature -65 150 °C DC CHARACTERISTICS (VDD = 3.3 V or 5 V unless noted) DC CHARACTERISTICS (VDD = 3.3 V or 5 V unless noted) DC CHARACTERISTICS (VDD = 3.3 V or 5 V unless noted) Operating Voltage, VDD 3.0 5.5 V Input High Voltage, VIH ICLK (VDD/2)+1 VDD/2 V Input Low Voltage, VIL ICLK VDD/2 (VDD/2)-1 V Input High Voltage, VIH S3:S0 2 V Input Low Voltage, VIL S3:S0 0.8 V Output High Voltage, VOH VDD=3.3V, IOH=-8mA 2.4 V Output Low Voltage, VOL VDD=3.3V, IOL=8mA 0.4 V Output High Voltage, VOH, VDD = 3.3 or 5 V IOH=-8mA VDD-0.4 V Operating Supply Current, IDD, at 3.3 V No Load, 25 MHz in, x4 35 mA Operating Supply Current, IDD, at 5 V No Load, 25 MHz in, x4 59 mA Power Down Supply Current, IDD, at 3.3 V S3:S0 = 0 (Gnd) 55 µA Short Circuit Current, VDD = 3.3 V Each output ±50 mA AC CHARACTERISTICS (VDD = 3.3 V or 5 V unless noted) AC CHARACTERISTICS (VDD = 3.3 V or 5 V unless noted) AC CHARACTERISTICS (VDD = 3.3 V or 5 V unless noted) Input Crystal or Clock Frequency 10 27 MHz Output Clock Rise Time 0.8 to 2.0 V 1.5 ns Output Clock Fall Time 2.0 to 0.8 V 1.5 ns Output Clock Duty Cycle At VDD/2 40 50 60 % Output to Output Skew Rising edges at VDD/2 250 ps Electrical Specifications Note: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability. External Components A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01 uF should be connected between VDD and GND on pins 4 and 6, and 16 and 14. Other VDDs and GNDs can be connected to these pins or directly to their respective power planes. A 33 Ω series terminating resistor may be used on the clock output if the trace is longer than 1-inch. The crystal should be a fundamental mode (do not use third overtone), parallel resonant, with accuracy as required by the application. Crystal capacitors should be connected from pins X1 to ground and X2 to ground. The value of these capacitors is given by the following equation, where CL is the crystal load capacitance: Crystal caps (pF) = (CL-12) x 2. So for a crystal with 18pF load capacitance, two 12pF caps should be used. For a clock input, connect it to X1/ICLK, and leave X2 unconnected (floating). |
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