MDS 552-02 B

2

Revision 050401

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PRE L IMINA R Y INF O RMA T IO N

ICS552-02

Pin Assignment

Input Source Select

Pin Descriptions

External Components

A minimum number of external components are required for proper operation. Decoupling capacitors of

0.01

µF should be connected between VDD on pin 2 and GND on pin 7, and between VDD on pin 15 and

GND on pin 10, as close to the device as possible. A 33

Ω series terminating resistor should be used on

each clock output if the trace is longer than 1 inch.

To achieve the low output skews that the ICS552-02 is capable of, careful attention must be paid to board

layout. Essentially, all 8 outputs must have identical terminations, identical loads, and identical trace

geometries. If they do not, the output skew will be degraded. For example, using a 30

Ω series termination

on one output (with 33

Ω on the others) will cause at least 15ps of skew.

12

1

11

2

10

3

9

OE

4

VDD

5

Q0

6

VDD

7

Q1

8

Q2

Q7

Q6

Q5

Q3

Q4

INA

GND

GND

16

15

14

13

INB

SELA

16 Pin TSSOP

SELA

Input

0INB

1INA

Pin

Number

Pin

Name

Pin

Type

Pin Description

1

OE

Input

Output Enable. Tri-states outputs when low. Internal pull-up resistor.

2

VDD

Power

Connect to +2.5V, +3.3V or +5.0V. Must be the same as pin 15.

3

Q0

Output

Clock Output 0

4

Q1

Output

Clock Output 1

5

Q2

Output

Clock Output 2

6

Q3

Output

Clock Output 3

7

GND

Power

Connect to ground.

8

INB

Input

Clock Input B. 5V tolerant input.

9

INA

Input

Clock Input A. 5V tolerant input.

10

GND

Power

Connect to ground.

11

Q4

Output

Clock Output 4

12

Q5

Output

Clock Output 5

13

Q6

Output

Clock Output 6

14

Q7

Output

Clock Output 7

15

VDD

Power

Connect to + 2.5V, +3.3V or +5.0V. Must be the same as pin 2.

16

SELA

Input

Selects either INA or INB. Internal pull-up resistor.