MDS 553 B

2

Revision 052501

w w w. icst . c om

ICS553

Pin Assignment

Pin Descriptions

External Components

A minimum number of external components are required for proper operation. A decoupling capacitor of

0.01

µF should be connected between VDD on pin 1 and GND on pin 4, as close to the device as possible.

A 33

Ω series terminating resistor may be used on each clock output if the trace is longer than 1 inch.

To achieve the low output skew that the ICS553 is capable of, careful attention must be paid to board

layout. Essentially, all 4 outputs must have identical terminations, identical loads and identical trace

geometries. If they do not, the output skew will be degraded. For example, using a 30

Ω series termination

on one output (with 33

Ω on the others) will cause at least 15ps of skew.

1

2

3

VDD

4

Q0

Q1

Q3

GND

Q2

ICLK

8

7

6

5

OE

8 Pi n (150 mi l) SOIC

Pin

Number

Pin

Name

Pin

Type

Pin Description

1

VDD

Power

Connect to +2.5V, +3.3V or +5.0V.

2

Q0

Output

Clock Output 0

3

Q1

Output

Clock Output 1

4

GND

Power

Ground

5

ICLK

Input

Clock Input. 5V tolerant input.

6

Q2

Output

Clock Output 2

7

Q3

Output

Clock Output 3

8

OE

Input

Output Enable. Tri-states outputs when low.