ICS9120M-08 datasheet(2/7 Pages) ICST

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ICS9120-08

ICS9120-09

Pin Configuration

Pin Descriptions for ICS9120-08

Functionality

PIN NUMBER

PIN NAME

TYPE

DESCRIPTION

Input

Crystal or external clock source. Has feedback bias for crystal.

2VDD

Power

Power supply input.

GND

Power

Ground return for Pin 2.

CLK3

Output

16.934 MHz target output clock for stereo codec.

CLK1

Output

24.576 MHz target output clock for stereo codec.

CLK2

Output

33.868 MHz target output clock for OPL4.

REF

Output

14.318 MHz reference clock buffered output.

Output

Crystal output drive.

Pin Descriptions for ICS9120-09

PIN NUMBER

PIN NAME

TYPE

DESCRIPTION

Input

External clock source.

VDD

Power

Power supply input.

GND

Power

Ground return for Pin 2.

CLK3

Output

16.934 MHz target output clock for stereo codec.

CLK1

Output

24.576 MHz target output clock for stereo codec.

CLK2

Output

33.868 MHz target output clock for OPL4.

REF

Output

14.318 MHz reference clock buffered output.

PD#

Input

Power-down input powers down entire device when low; has pull-up.

Note: (Pin 8) is internally pulled-up to VDD and, therefore, may

be left disconnected or driven by open collector logic.

8-Pin SOIC

X1, X2

(MHz)

(-09 only)

PD#

33.9

(MHz)

16.9

(MHz)

24.6

(MHz)

14.3

(MHz)

Low

14.318

33.868

16.934

24.576

14.318

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