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changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata

May 1996

COPYRIGHT

INTEL CORPORATION 1996

Order Number 272434-004

80C186EC80C188EC AND 80L186EC80L188EC

16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

Y

Integrated Feature Set

Low-Power Static Enhanced 8086

CPU Core

Two Independent DMA Supported

UARTs each with an Integral Baud

Rate Generator

Four Independent DMA Channels

22 Multiplexed IO Port Pins

Two 8259A Compatible

Programmable Interrupt Controllers

Three Programmable 16-Bit Timer

Counters

32-Bit Watchdog Timer

Ten Programmable Chip Selects with

Integral Wait-State Generator

Memory Refresh Control Unit

Power Management Unit

On-Chip Oscillator

System Level Testing Support

(ONCE Mode)

Y

Direct Addressing Capability to 1 Mbyte

Memory and 64 Kbyte IO

Y

Low-Power Operating Modes

Idle Mode Freezes CPU Clocks but

Keeps Peripherals Active

Powerdown Mode Freezes All

Internal Clocks

Powersave Mode Divides All Clocks

by Programmable Prescalar

Y

Available in Extended Temperature

Y

Supports 80C187 Numerics Processor

Extension (80C186EC only)

Y

Package Types

100-Pin EIAJ Quad Flat Pack (QFP)

100-Pin Plastic Quad Flat Pack

(PQFP)

100-Pin Shrink Quad Flat Pack

(SQFP)

Y

Speed Versions Available (5V)

25 MHz (80C186EC2580C188EC25)

20 MHz (80C186EC2080C188EC20)

13 MHz (80C186EC1380C188EC13)

Y

Speed Version Available (3V)

16 MHz (80L186EC1680L188EC16)

13 MHz (80L186EC1380L188EC13)

The 80C186EC is a member of the 186 Integrated Processor Family The 186 Integrated Processor Family

incorporates several different VLSI devices all of which share a common CPU architecture the 80868088

The 80C186EC uses the latest high density CHMOS technology to integrate several of the most common

system peripherals with an enhanced 8086 CPU core to create a powerful system on a single monolithic

silicon die