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AS87196CB Scheda tecnica(PDF) 22 Page - Intel Corporation |
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AS87196CB Scheda tecnica(HTML) 22 Page - Intel Corporation |
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22 / 33 page ![]() 87C196CA87C196CB AC CHARACTERISTICSSLAVE PORT (Continued) SLAVE PORT WAVEFORM(SLPL e 1) 272405 – 22 SLAVE PORT TIMING(SLPL e 1 2 3) Symbol Parameter Min Max Units TSELLL CS Low to ALE Low 20 ns TSRHEH RD or WR High to CS High 60 ns TSLLRL ALE Low to RD Low TOSC ns TSRLRH RD Low Period TOSC ns TSWLWH WR Low Period TOSC ns TSAVLL Address Valid to ALE Low 20 ns TSLLAX ALE Low to Address Invalid 20 ns TSRLDV RD Low to Output Data Valid 60 ns TSDVWH Input Data Setup to WRHigh 20 ns TSWHQX WR High to Data Invalid 30 ns TSRHDZ RD High to Data Float 15 ns NOTES 1 Test Conditions FOSC e 20 MHz TOSC e 60 ns RiseFall Time e 10 ns Capacitive Pin Load e 100 pF 2 These values are not tested in production and are based upon theoretical estimates andor laboratory tests 3 Specifications above are advanced information and are subject to change 22 |
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