87C51 datasheet(4/21 Pages) INTEL

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87C5180C51BH80C31BH

PIN DESCRIPTION

VCC Supply voltage during normal Idle and Power

Down operations

VSS Circuit ground

Port 0

Port 0 is an 8-bit open drain bidirectional IO

port As an output port each pin can sink several LS

TTL inputs Port 0 pins that have 1’s written to them

float and in that state can be used as high-imped-

ance inputs

Port 0 is also the multiplexed low-order address and

data bus during accesses to external memory In this

application it uses strong internal pullups when emit-

ting 1’s

Port 0 also receives the code bytes during EPROM

programming and outputs the code bytes during

program verification External pullups are required

during program verification

Port 1

Port 1 is an 8-bit bidirectional IO port with

internal pullups The Port 1 output buffers can drive

LS TTL inputs Port 1 pins that have 1’s written to

them are pulled high by the internal pullups and in

that state can be used as inputs As inputs Port 1

pins that are externally pulled low will source current

(IIL on the data sheet) because of the internal pull-

ups

Port 1 also receives the low-order address bytes

during EPROM programming and program verifica-

tion

Port 2

Port 2 is an 8-bit bidirectional IO port with

internal pullups Port 2 pins that have 1’s written to

them are pulled high by the internal pullups and in

that state can be used as inputs As inputs Port 2

pins that are externally pulled low will source current

(IIL on the data sheet) because of the internal pull-

ups

Port 2 emits the high-order address byte during

fetches from external Program memory and during

accesses to external Data Memory that use 16-bit

address (MOVX

DPTR) In this application it uses

strong internal pullups when emitting 1’s

During accesses to external Data Memory that use

8-bit addresses (MOVX

Ri) Port 2 emits the con-

tents of the P2 Special Function Register

Port 2 also receives some control signals and the

high-order address bits during EPROM programming

and program verification

Port 3

Port 3 is an 8-bit bidirectional IO port with

internal pullups The Port 3 output buffers can drive

LS TTL inputs Port 3 pins that have 1’s written to

them are pulled high by the internal pullups and in

that state can be used as inputs As inputs Port 3

pins that are externally pulled low will source current

(IIL on the data sheet) because of the pullups

Port 3 also serves the functions of various special

features of the MCS-51 Family as listed below

Name

Alternate Function

P30

RXD

Serial input line

P31

TXD

Serial output line

P32

INT0

External Interrupt 0

P33

INT1

External Interrupt 1

P34

Timer 0 external input

P35

Timer 1 external input

P36

External Data Memory Write strobe

P37

External Data Memory Read strobe

Port 3 also receives some control signals for

EPROM programming and program verification

RST

Reset input A high on this pin for two machine

cycles while the oscillator is running resets the de-

vice The port pins will be driven to their reset condi-

tion when a minimum VIH1 voltage is applied wheth-

er the oscillator is running or not An internal pull-

down resistor permits a power-on reset with only a

capacitor connected to VCC

ALEPROG

Address Latch Enable output signal for

latching the low byte of the address during accesses

to external memory This pin is also the program

pulse input (PROG) during EPROM programming for

the 87C51

If desired ALE operation can be disabled by setting

bit 0 of SFR location 8EH With this bit set the pin is

weakly pulled high However the ALE disable fea-

ture will be suspended during a MOVX or MOVC in-

struction idle mode power down mode and ICE

mode The ALE disable feature will be terminated by

reset When the ALE disable feature is suspended or

terminated the ALE pin will no longer be pulled up

weakly Setting the ALE-disable bit has no effect if

the microcontroller is in external execution mode

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