HC55151 datasheet(30/35 Pages) INTERSIL

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Activates Test Relay TRLY1.

TTL Compatible Logic Input. The logic states of C1, C2 and C3 determine the operating states of the

SLIC. Reference Table 1 for details.

TTL Compatible Logic Input. The logic states of C1, C2 and C3 determine the operating states of the

SLIC. Reference Table 1 for details.

TTL Compatible Logic Input. The logic states of C1, C2 and C3 determine the operating states of the

SLIC. Reference Table 1 for details.

SHD

Switch Hook Detect - Active during off hook, ground key and loopback. Reference Table 1 for details.

GKD_LVM

Ground Key Detector and Line Voltage Measurement - Reference Table 1 for details.

VCC

5V Supply.

Loop Current Threshold Programming Pin - A resistor between this pin and ground will determine the

trigger level for the loop current detect circuit. See Equation 7.

ROH

Off Hook Overload Setting Resistor - Used to set combined overhead for voice and pulse metering

signals. See Equation 10.

ILIM

Current Limit Programming Pin - A resistor between this pin and ground will determine the constant

current limit of the feed curve. See Equation 11.

RSYNC_REV

Ring Synchronization Input and Reversal Time Setting. A resistor between this pin and GND

determines the polarity reversal time. Synchronization of the closing of the relay at zero voltage is

achieved via a ring sync pulse (5V to 0V) synchronized to the ring signal zero voltage crossing

(Reference Figure 18).

AGND

Analog ground

VRX

Receive Input - Ground referenced 4-wire side.

SPM

Pulse Metering Signal Input. If pulse metering is not used, then this pin should be grounded as close

to the device pin as possible.

VTX

Transmit Output - Ground referenced 4-wire side.

TRLY2

Test Relay Driver 2.

TRLY1

Test Relay Driver 1.

Pin Descriptions (Continued)

PLCC

SOIC

SYMBOL

DESCRIPTION

HC55120, HC55121, HC55130, HC55131, HC55140, HC55141, HC55142, HC55143, HC55150, HC55151

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