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UPC1853 Scheda tecnica(PDF) 17 Page - NEC |
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UPC1853 Scheda tecnica(HTML) 17 Page - NEC |
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17 / 76 page ![]() µPC1853 17 3. I2C BUS INTERFACE The µPC1853 has serial bus function. This serial bus (I2C bus) is a double wired bus developed by Philips. It is composed of 2 wires: serial clock line (SCL) and serial data line (SDA). The µPC1853 has built-in I2C bus interface circuit, 9 rewritable registers (8 bits). SCL (Serial Clock Line) The master CPU outputs serial clock to synchronize with the data. According to this clock, the µPC1853 takes in the serial data. Input level is compatible with CMOS. Clock frequency is 0 to 100 kHz. SDA (Serial Data Line) The master CPU outputs the data which is synchronized with serial clock. The µPC1853 takes in this data according to the clock. Input level is compatible with CMOS. Fig. 3-1 Internal Equivalent Circuits of Interface Pin SCL SDA RP RP PC1853 µ 3.1 Data Transfer 3.1.1 Start condition Start condition is made by falling of SDA from “High” to “Low” during SCL is “High” as shown in Fig. 3-2. When this start condition is received, the µPC1853 takes in the data synchronizing with the clock after that. |
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