R5F6451MLFD datasheet(17/122 Pages) RENESAS

17 / 122 page

R01DS0072EJ0120 Rev.1.20

Page 17 of 116

Aug 07, 2013

R32C/151 Group

2. Central Processing Unit (CPU)

2.1.8.5

This flag selects a register bank. It indicates 0 when register bank 0 is selected, and 1 when register

bank 1 is selected.

2.1.8.6

Overflow Flag (O flag)

This flag becomes 1 when the result of an operation overflows; otherwise it is 0.

2.1.8.7

Interrupt Enable Flag (I flag)

This flag enables maskable interrupts. To disable maskable interrupts, set this flag to 0. To enable

them, set this flag to 1. When an interrupt is accepted, the flag becomes 0.

2.1.8.8

Stack Pointer Select Flag (U flag)

To select the interrupt stack pointer (ISP), set this flag to 0. To select the user stack pointer (USP), set

this flag to 1.

It becomes 0 when a hardware interrupt is accepted or when an INT instruction designated by a

software interrupt number from 0 to 127 is executed.

2.1.8.9

Floating-point Underflow Flag (FU flag)

This flag becomes 1 when an underflow occurs in a floating-point operation; otherwise it is 0. It also

becomes 1 when the operand contains invalid numbers (subnormal numbers).

2.1.8.10

Floating-point Overflow Flag (FO flag)

This flag becomes 1 when an overflow occurs in a floating-point operation; otherwise it is 0. It also

becomes 1 when the operand contains invalid numbers (subnormal numbers).

2.1.8.11

Processor Interrupt Priority Level (IPL)

The processor interrupt priority level (IPL), consisting of 3 bits, selects a processor interrupt priority

level from level 0 to 7. An interrupt is enabled when the interrupt request level is higher than the

selected IPL.

When the processor interrupt priority level (IPL) is set to 111b (level 7), all interrupts are disabled.

2.1.8.12

Fixed-point Radix Point Designation Bit (DP bit)

This bit designates the radix point. It also specifies which portion of the fixed-point multiplication result

to extract. It is used for the MULX instruction.

2.1.8.13

Floating-point Rounding Mode (RND)

The 2-bit floating-point rounding mode selects a rounding mode for floating-point calculation results.

2.1.8.14

Reserved

Only set this bit to 0. The read value is undefined.

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