R5F363AMNFA datasheet(117/119 Pages) RENESAS

117 / 119 page

A - 2

2.00

Feb 07, 2011

71 to 78, 92

to 99

Table 5.35 to Table 5.40 and Table 5.56 to Table 5.61 Memory Expansion Mode and

Microprocessor Mode:

Deleted the following:

•

HOLD input setup time

•

HOLD input hold time

•

HLDA output delay time

72, 93

Figure 5.14 and Figure 5.29 Timing Diagram:

Deleted lower figure (Common to wait state and no wait state settings).

83, 104

Figure 5.20 and Figure 5.35 Timing Diagram: Changed the width of th(RD-AD).

Table 5.41 Electrical Characteristics (1):

• Added rows for the CEC value to VOL, VT+-VT-, and Leakage current in powered-off state.

• Added “ZP, IDU, IDV, IDW” to the VT+ - VT- row.

Table 5.42 Electrical Characteristics (2): Changed “VCC1 = 5.0 V” to "VCC1 = 3.0 V" in the

During flash memory program and During flash memory erase rows.

Table 5.56 Memory Expansion Mode and Microprocessor Mode:

Changed

RDY input setup time from 40.

105

Table 5.62 Electrical Characteristics (1):

• Changed the Measuring Condition over the table.

• Added “ZP, IDU, IDV, IDW” to the Parameter column and the value to the Measuring

Condition in the VT+ - VT- row.

• Changed the Measuring Condition in the IIH row.

106, 107

Table 5.63 Electrical Characteristics (2) and Table 5.64 Electrical Characteristics (3):

Changed the Measuring Condition over the table.

108

Table 5.66 External Clock Input (XIN Input): Changed the condition in note 1.

2.20 Nov 01, 2012 Overview

Table 1.1 Specifications for the 100-Pin Package (1/2): Added the condition for 100.0 ns and

changed the condition for 200 ns in the Minimum instruction execution time in the Description

column of the CPU.

Table 1.2 Specifications for the 100-Pin Package (2/2): Added “10 MHz/VCC1 = 2.1 to 5.5 V,

VCC2 = 2.1 V to VCC1” to the Description column of the Operation Frequency/Supply Voltage.

Table 1.3 Specifications for the 80-Pin Package (1/2): Added the condition for 100.0 ns and

changed the condition for 200 ns in the Minimum instruction execution time in the Description

column of the CPU.

Table 1.4 Specifications for the 80-Pin Package (2/2): Added “10 MHz/VCC1 = 2.1 to 5.5 V” to

the Description column of the Operation Frequency/Supply Voltage.

Electrical Characteristics

Table 5.4 Recommended Operating Conditions (3/4)

• Changed the Parameter “2.7 V

≤ VCC1 < 5.5 V” to “2.7 V ≤ VCC1 < 5.5 V, 1 MHz ≤ f(XIN) ≤ 20

MHz” in f(BCLK).

• Added the line for “2.1 V

≤ VCC1 < 2.7 V, 1 MHz ≤ f(XIN) ≤ 10 MHz” in f(BCLK).

• Changed the Parameter “1.8 V

≤ VCC1 < 2.7 V” to “1.8 V ≤ VCC1 < 2.1 V, 1 MHz ≤ f(XIN) ≤ 10

MHz” in f(BCLK).

Figure 5.1 Relation between f(BCLK) and VCC1: Modified the range of 2.1 V ≤ VCC1 < 2.7 V.

REVISION HISTORY

M16C/63 Group Datasheet

Rev.

Date

Description

Page

Summary

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