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R5F363AMNFB Scheda tecnica(PDF) 73 Page - Renesas Technology Corp |
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R5F363AMNFB Scheda tecnica(HTML) 73 Page - Renesas Technology Corp |
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73 / 119 page ![]() R01DS0033EJ0220 Rev.2.20 Page 73 of 115 Nov 01, 2012 M16C/63 Group 5. Electrical Characteristics VCC1 = VCC2 = 5 V 5.2.4 Switching Characteristics (Memory Expansion Mode and Microprocessor Mode) (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.2.4.1 In No Wait State Setting Notes: 1. Calculated according to the BCLK frequency as follows: f(BCLK) is 12.5 MHz or less. 2. Calculated according to the BCLK frequency as follows: 3. This standard value shows the timing when the output is off, and does not show hold time of data bus. Hold time of data bus varies with capacitor volume and pull-up (pull-down) resistance value. Hold time of data bus is expressed in t = −CR × ln(1−V OL/VCC2) by a circuit of the right figure. For example, when VOL = 0.2VCC2, C = 30 pF, R = 1 kΩ, hold time of output low level is t = −30 pF × 1 kΩ × In(1 − 0.2V CC2/VCC2) = 6.7 ns. Table 5.36 Memory Expansion Mode and Microprocessor Mode (in No Wait State Setting) Symbol Parameter Measuring Condition Standard Unit Min. Max. td(BCLK-AD) Address output delay time See Figure 5.15 25 ns th(BCLK-AD) Address output hold time (in relation to BCLK) 0ns th(RD-AD) Address output hold time (in relation to RD) 0ns th(WR-AD) Address output hold time (in relation to WR) (Note 2) ns td(BCLK-CS) Chip select output delay time 25 ns th(BCLK-CS) Chip select output hold time (in relation to BCLK) 0ns td(BCLK-ALE) ALE signal output delay time 15 ns th(BCLK-ALE) ALE signal output hold time −4ns td(BCLK-RD) RD signal output delay time 25 ns th(BCLK-RD) RD signal output hold time 0ns td(BCLK-WR) WR signal output delay time 25 ns th(BCLK-WR) WR signal output hold time 0ns td(BCLK-DB) Data output delay time (in relation to BCLK) 40 ns th(BCLK-DB) Data output hold time (in relation to BCLK) (3) 0ns td(DB-WR) Data output delay time (in relation to WR) (Note 1) ns th(WR-DB) Data output hold time (in relation to WR) (3) (Note 2) ns 0.5 10 9 × f BCLK () ----------------------40 ns [] – 0.5 10 9 × f BCLK () ----------------------10 ns [] – DBi R C |
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