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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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AN3316 Scheda tecnica(PDF) 18 Page - STMicroelectronics |
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AN3316 Scheda tecnica(HTML) 18 Page - STMicroelectronics |
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18 / 42 page  Device modes AN3316 18/42 Doc ID 18232 Rev 2 2.4.1 Power-on reset phase (RESET DRUN) Following, a chart that describes the start-up phase from CFLASH: Figure 9. Transition (HW start-up) RESET DRUN (execution from CFlash) 2.4.2 Application scenarios The following scenarios shown are the typical ones that well describes the behavior of both running and low power modes. GATED POWERED RESET EXECUTE DRUN STOP RUNNING ULTRA LP LOW POWER FULL POWER ULP-VREGI SET-UP IRC 16M LVD & MVREG Stabilize Flash analog supply CFLASH initialization ME CORE MODE IRC 16M VREG RESET (dig.) STRAT-UP SEQUENCE CONSUMP- TION PROFILE 10s 2s 33 s 20s 125s 5s Transition time: ~200s 25A ~5mA ~30mA ~20mA Power-On Reset 500mA(max) Transition time: 200s Average conso: ~26mA |
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