AN1751 - APPLICATION NOTE

2/7

Aplac models take into account of die, bumps and via for the ground connections. It does not consider PCB

track in the application.

Figure 2 represents an example of Aplac model for one filtering cell.

Rsubump

Cin

Rsubump

Cout

MODEL = D02

MODEL = D01

Rs

I1

O1

Die model

gnd

Lbump

Rbump

Cgnd

Lgnd

Rgnd

Via model

Bump model

Fig. 2: Aplac model for die, bumps and PCB via.

P-Spice is probably the most wellknown simulation software in electronic industry. Limits of P-Spice is

reached when trying to simulate RF signals because of the time it takes for each simulation. It is also

impossible to simulate crosstalk phenomena. Aplac has been developed to avoid all these P-Spice

limitations.

Concerning measurements, the first step is to calibrate the equipment. This is why demoboards are

delivered with a calibration kit shown in

figure 3 while the IPAD™ device is on another board (figure 4).

Fig. 3: Calibration board.

50

Ω

50

Ω

Vg

Fig. 4: Measurement condition on demoboard.

If test equipment is not calibrated, non negligible error can occur as the attenuation measurement will

correspond to the one of the IPAD™ + board + connections. Furthermore measurement is done with a

50

Ω load while some applications may have other impedances.