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AN4129 Scheda tecnica(PDF) 7 Page - STMicroelectronics |
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AN4129 Scheda tecnica(HTML) 7 Page - STMicroelectronics |
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7 / 39 page ![]() AN4129 Theory of operation Doc ID 023314 Rev 1 7/39 2.2 PFC-flyback In the PFC-flyback converter the input voltage is the rectified line voltage, with almost no filtering. Converter input voltage goes to zero when the line voltage crosses zero. It's common practice to use the rectified line voltage as a reference for the peak current in the flyback converter's switch. This does not result in sinusoidal input current, but it is close enough. The duty cycle change with input voltage still distorts the waveform. This is discussed in detail in ST's AN1059 application note. Figure 4. Distortion of input current with sinewave reference 2.3 Primary side control A PFC-flyback converter usually uses a PFC controller chip such as ST's L6562AT with an external FET and a feedback loop. The secondary side voltage and/or current are monitored, compared to a reference on the secondary side, and a control signal sent to the primary side with an opto-isolator. This signal is multiplied by a reference waveform (the rectified line voltage) and used to control peak switch current. ST has developed a primary-side control circuit that eliminates the need for the secondary- side components. Voltage is monitored on the housekeeping winding at the end of the flyback converter's discharge cycle, just as the secondary current reaches zero. Secondary current is set by measuring duty cycle and adjusting peak primary current, to provide a calculated secondary average current. But the circuit cannot work with a multiplier, so another method of shaping the peak switch current waveform must be found. 2.4 Using the HVLED815PF current limit for power factor correction 2.4.1 Average current regulation The HVLED815PF does an excellent job of regulating output current in a DC input flyback supply. It calculates the peak current at which to shut off the driving FET by looking at the duty cycle continuously. The error between desired duty cycle and actual duty cycle appears as a current on the ILED pin - a capacitor on this pin integrates the error to zero over time. Since the voltage on this pin, divided by 2, directly sets the current at which the FET switch turns off, the output current is regulated. |
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