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UPD17708 Scheda tecnica(PDF) 35 Page - NEC |
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UPD17708 Scheda tecnica(HTML) 35 Page - NEC |
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35 / 356 page ![]() 35 µPD17704, 17705, 17707, 17708, 17709 4. DATA MEMORY (RAM) 4.1 Outline of Data Memory Figure 4-1 outlines the data memory. As shown in the figure, system registers, a data buffer, port registers, and port input/output selection registers are located on the data memory. The data memory stores data, transfers data with the peripheral hardware or ports, and controls the CPU. Figure 4-1. Outline of Data Memory (1/3) (a) µPD17709 Note Port input/output selection registers are allocated to addresses 60H through 6FH of BANK 15. Peripheral hardware Data transfer Column address Data memory BANK0 Port registers Port registers Port registers Port registers BANK1 BANK2 BANK3 BANK4 BANK14 BANK15Note System registers Ports 0123456789 A B C D E F Data transfer 0 1 2 3 4 5 6 7 Data buffer |
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