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AN829 Scheda tecnica(PDF) 7 Page - STMicroelectronics |
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AN829 Scheda tecnica(HTML) 7 Page - STMicroelectronics |
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7 / 9 page ![]() 7/9 AN829 APPLICATION NOTE Then the maximum rms voltage across the sense is: RMS sense voltage = 15m Ω 16A = .24V Then R8 = R9 = .24V / 60 µA # 4kΩ Critical current amplifier gain occurs when the current error amplifier slope exceeds the oscillator slope. This condition occurs when: Voca fs = (Vo/Lb) Rsense Gca Gca = current amplifier gain Voca = current amplifier output voltage fs = switching frequency Lb = boost inductor value Then Gca = Voca fs Lb / (Vo Rsense) = 5 45E+3 0.8E-3 / 400 0.015 = 28 Setting Gca # 25 enables the calculation of Rz and Cz: Rz # GcaR9 # 100kΩ Cz = 1 / 2pfcRz with a crossover frequency fc of 10kHz. then Cz=150pF. Capacitor Cp can eventually be added to reduce the phase lag of the amplifier. IMPLEMENTATION AND SWITCHING BEHAVIOR Using a double-sided PCB significantly reduces the parasitic inductances of the circuit: – parasitic inductance Lp1 and Lp2 shown in figure 1 are intrinsic characteristics of the ISOTOP module itself; these values are very low (less than 10nH). – parasitic inductances Lp3 and Lp4 are due to the ISOTOP/capacitor loop. The proposed layout re- sults in about 20 nH for Lp3+Lp4. These values mean that the total voltage overshoot during the turn off of the MOSFET is limited to about 30V with a di/dt of 1000A/sec with no snubber. – parasitic inductance Lp5 is a few nH due to the use of an active current sense in a TO- 218 package. This results in an excellent signal/ noise ratio at the current error amplifier input. The following mea- surements have been made with the iron powder inductor as described in paragraph 4. Figure 5 shows the most important signals with an input voltage of 208Vac and an output power of 1600W. To show the current ripple more clearly, one second persistence has been used. The slight overshoot of the current error amplifier output during the mains zero voltage crossing is due to the rise of the inductor permeability at low induction. Indeed, the inductor size optimisation requires operation with 50% saturation of the iron at maximum peak current. Figure 6 shows average values of the waveforms in figure 5. Figure 7 shows the input current and voltage with 120Vac mains and 1600W output Power. Figure 8 shows the drain voltage and source current during turn off. Note that the source current probing cre- ates a parasitic inductance, limiting the di/dt. Thus there is no significant turn off overvoltage. Figure 9 shows the diode recovery current with a forward current of 20A and a di/dt of 700A/ µsec. Note that the Rgn gate drive resistance can be adjusted to tightly control the di/dt. This is still acting with high di/dt value due to the low parasitic inductance of the gate drive. Thermal measurements have been performed enabling the |
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