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UPD178016 Scheda tecnica(PDF) 4 Page - NEC |
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UPD178016 Scheda tecnica(HTML) 4 Page - NEC |
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4 / 56 page ![]() µPD178004, 178006, 178016, 178018 4 Product name µPD178004 µPD178006 µPD178016 µPD178018 Item Standby function • HALT mode • STOP mode Reset • Reset by RESET pin • Internal reset by watchdog timer • Reset by power-ON clear circuit (3-value detection) • Detection of less than 4.5 VNote (CPU clock: fX) • Detection of less than 3.5 VNote (CPU clock: fX/2 or less and on power application) • Detection of less than 2.5 VNote (in STOP mode) Power supply voltage • VDD = 4.5 to 5.5 V (with PLL operating) •VDD = 3.5 to 5.5 V (with CPU operating, CPU clock: fX/2 or less) •VDD = 4.5 to 5.5 V (with CPU operating, CPU clock: fX) Package • 80-pin plastic QFP (14 × 14 mm, 0.65-mm pitch) Note These voltage values are maximum values. The reset is actually executed at a voltage lower than these values. (2/2) |
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