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AN2837 Scheda tecnica(PDF) 5 Page - STMicroelectronics |
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AN2837 Scheda tecnica(HTML) 5 Page - STMicroelectronics |
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5 / 12 page ![]() AN2837 Design considerations 5/12 2 Design considerations Figure 1 shows the typical configuration of a polarity inverting regulator using the ST1S03. Note that the ground is connected to the negative output and the feedback is referred to GND, so the device is supplied by VIN plus the magnitude of VOUT (i.e. for 5 VIN and -5 VOUT, the total VIN for device is 10 V). For this reason, the AMR of device cannot be exceeded. For example, 12 VIN and -12 VOUT for a 24 V total it not possible due to the 18 V AMR (see Figure 4). The output voltage is programmed by connecting feedback resistors from GND to -VOUT (close the output capacitor to have best performance in terms of stability). Small capacitor C2 is connected from the input to the negative output in order to provide more phase margin to stabilize the regulator loop. R3 and C4 form a simple R-C filter on the analog input, which helps to reduce noise on the supply voltage, as well as improve stability. Figure 4. Total voltage of inductor +5V IN -5.5V OUT V TOTAL 0V +5V IN -5.5V OUT V TOTAL 0V |
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