Circuit description

AN2983

10/32

Doc ID 15679 Rev 1

This causes the gate driver to go high again and then the power MOSFET to conduct.

The time delay toff is simply governed by the equation of the discharge of the capacitor C8

through the resistor R18 with the boundary conditions V (t0) = 5.7 V, V (t1) = 0.7 V.

Equation 7

Equation 8

Equation 9

With our values this gives:

Equation 10

waveforms with the LEDs’ current (I_LED), capacitor (C8) voltage (V_C8) and gate drive

output voltage (V_GD).

Figure 9.

toff delay (actual)

It is worth noting that the real toff time is 1.57 µS and that the low threshold is 0.44 V. This is

due to the components’ tolerance and to the propagation delay from the comparator input to

the gate driver output.

b.

See Chapter 5: References on page 30.

⎥⎦

⎤

⎢⎣

⎡

−

=

8

*C

18

R

(toff)

0

1

e

*

)

t

(

V

)

t

(

V

⎥

⎦

⎤

⎢

⎣

⎡

−

=

⎥

⎦

⎤

⎢

⎣

⎡

8

18

0

1

C

*

R

toff

)

t

(

V

)

t

(

V

ln

⎥

⎦

⎤

⎢

⎣

⎡

=

)

t

(

V

)

t

(

V

ln

*

)

C

*

R

(

toff

1

0

8

18

S

17

.

1

)

C

*

R

(

*

1

.

2

7

.

0

7

.

5

ln

*

)

C

*

R

(

toff

8

18

8

18

μ

=

=

⎥⎦

⎤

⎢⎣

⎡

=