Startup sequence

AN2989

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Doc ID 15761 Rev 1

Figure 2.

Interrupt and DataReady signal generation block diagram

In particular, the DataReady (DR) signal rises to 1 when a new set of acceleration data has

been generated and is available for reading. The signal is reset after all the enabled

channels are read through the serial interface.

Figure 3.

DataReady signal

2.4

Understanding acceleration data

The measured acceleration data are sent into the OUTX, OUTY, OUTZ registers.

Acceleration data for the X (Y, Z) channel is expressed as a 2’s complement number.

2.4.1

Data alignment

Acceleration data are represented as 8-bit numbers, two’s complement and are right

justified.

2.4.2

Example of acceleration data

Table 5 provides a few basic examples of the data that is read in the data registers when the

device is subject to a given acceleration. The values listed in the table are given under the

hypothesis of perfect device calibration (no offset, no gain error, etc.).