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AN3352 Scheda tecnica(PDF) 10 Page - STMicroelectronics |
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AN3352 Scheda tecnica(HTML) 10 Page - STMicroelectronics |
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10 / 26 page ![]() Block diagram and pin function description AN3352 10/26 Doc ID 018526 Rev 3 12/29 TTX-A/ TTX-B TTX enable This pin, as well as the TTX I²C bit of the system register, is used to control the TTX function enable before starting the 22 kHz tone transmission. Set this pin floating or to GND if not used. 11/30 Reserved Reserved To be connected to GND 9/32 PDC-A/ PDC-B Pull-down control To be connected to the external NPN transistor base to reduce the 22 kHz tone distortion in case of heavy capacitive load at light output current. If not used it can be left floating. 13/28 EXTM-A/ EXTM-B External modulation External Modulation Input acts on VORX linear regulator output to superimpose an external 22 kHz signal. Needs DC decoupling to the AC source. If not used it can be left floating. 4/3 P-GND Power ground DC-DC converter power ground to be connected directly below the ePad of the PCB top GND layer ePad ePad ePad On the bottom side of the QFN-32 package. It must be connected with power ground and to the ground layer through vias to dissipate heat. 22 A-GND Analog ground Analog circuits ground 19 BYP Bypass capacitor Needed for internal pre-regulator filtering. The BYP pin is intended only to connect an external ceramic capacitor. Any connection of this pin to an external current or voltage sources may cause permanent damage to the device. 8/1 ADDR-A/ ADDR-B Address setting Two I²C bus addresses available by setting the ADDR pin voltage level 15/26 ISEL-A/ ISEL-B Current selection The resistor RSEL connected between ISEL and GND defines the linear regulator current limit threshold by the equation: Imax(typ.) = 10000 / RSEL 14/27 Reserved Reserved To be left floating. Do not connect to GND. Table 3. LNBH24L pin description (continued) |
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