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AN4116 Scheda tecnica(PDF) 14 Page - STMicroelectronics |
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AN4116 Scheda tecnica(HTML) 14 Page - STMicroelectronics |
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14 / 38 page ![]() Testing the board AN4116 14/38 Doc ID 023220 Rev 1 5.2 Precision of the regulation and output voltage ripple The output voltage of the board has been measured in different line and load conditions with the results shown in Table 4. The output voltage is practically not affected by the line condition and by the IC biasing (self-supply or not). Table 4. Output voltage line-load regulation VIN [VAC] VOUT [V] No load 50% load 75% load 100% load IC externally biased IC self- biased IC externally biased IC self- biased IC externally biased IC self- biased IC externally biased IC self- biased 90 12.04 12.05 12.00 11.98 12.00 11.98 11.99 11.97 115 12.05 12.05 12.00 11.99 12.00 11.98 11.99 11.97 150 12.05 12.05 12.00 11.98 12.00 11.98 11.99 11.97 180 12.05 12.04 12.00 11.98 12.00 11.98 11.99 11.97 230 12.05 12.04 12.00 11.98 12.00 11.98 11.99 11.97 265 12.05 12.04 12.00 11.98 12.00 11.98 11.99 11.97 Figure 13. Line regulation at different loads; IC externally biased (J1 selected) Figure 14. Line regulation at different loads; IC self-biased (J1 not selected) AM11688v1 11.7 11.8 11.9 12 12.1 12.2 80 105 130 155 180 205 230 255 V IN[VAC] 0 25% 50% 75% 100% AM11689v1 11.7 11.8 11.9 12 12.1 12.2 80 105 130 155 180 205 230 255 V IN [V AC] 0 25% 50% 75% 100% |
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