1

LT685

685fa

RESISTANCE (Ω)

100

200

500

1

10

100

1k

2k

5k

10k

LT685 • TA02

HYSTERESIS IS ZERO

IF PIN LEFT OPEN

FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

High Speed Comparator

■

Ultrafast (5.5ns typ)

■

Complementary ECL Output

■

50Ω Line Driving Capability

■

Low Offset Voltage

■

Output Latch Capability

■

External Hysteresis Control

■

Pin Compatible with Am685

■

High Speed A-to-D Converters

■

High Speed Sampling Circuits

■

Oscillators

The LT

inputs and complementary outputs fully compatible with

ECL logic levels. The output current capability is adequate

for driving transmission lines terminated in 50Ω. The low

input offset and high resolution make this comparator

ideally suited for analog-to-digital signal processing

applications.

A latch function is provided to allow the comparator to be

used in a sample-hold mode. When the latch enable input

is ECL high, the comparator functions normally. When the

latch enable is driven low, the comparator outputs are

locked in their existing logical states. If the latch function

is not used, the latch enable must be connected to ground

or ECL high.

The device is pin-compatible with the Am685. Hysteresis

has been added to improve switching time with slow input

signals as well as to minimize oscillation. A single resistor

voltage as more current is drawn. If hysteresis is not

required, the pin can be left unconnected.

, LTC and LT are registered trademarks of Linear Technology Corporation.

Comparator with Hysteresis

Hysteresis

–

+

LT685

6V

–5.2V

R

GND1

GND2

Q

Q

HYSTERESIS

LATCH

ENABLE

LT685 • TA01