AN1889 datasheet(6/33 Pages) STMICROELECTRONICS

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ESBT: theory and evolution

AN1889

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As shown in Figure 3, a DMOS structure is diffused on a higher resistivity layer overlaying

the highly doped emitter region (NBL in the cross section). In terms of diffused and

deposited layers the DMOS structure is quite similar to that of a standard low voltage power

MOSFET even if, of course, its layout is arranged to match the emitter geometry of the BJT

stage. Finally the base contact are placed on a diffused layer deep enough to reach the

base buried layer (PBL).

As previously mentioned to switch-on the ESBT it is necessary to positively bias the gate

with a voltage higher than its threshold (typically 3.5 V for the device in subject), this will

generate, like in all voltage driven transistors, the inversion of the portion of the body region

under the gate oxide of the vertical n-channel MOSFET, so that the emitter results

connected to the ground. In the mean time the base driver supplies the current needed to

saturate the BJT stage leading the ESBT to a high on-state current density due to the high

injection of electrons from the N+ emitter region, similarly to the case of pure power bipolar

transistors. The On-voltage drop is represented by the Collector-Source saturation voltage,

say the VCS(sat), and it is consequently given by the contribution of the VCE(sat) of the bipolar

stage plus the small voltage drop of the low voltage MOSFET. Being the bipolar behavior

predominant, the voltage drop results not very sensitive to the temperature variations.

With zero bias in the gate and with grounded base the device behaves like a reverse biased

diode during the off state. The switching-off behavior had already been deeply analyzed at

the beginning of this chapter. It is important to add that the sandwich structure gives an

uniformity of the current density across the whole area of the device. In fact the MOSFET

placed over the BJT (in series with its emitter) acts as a sort of "ideal ballast emitter resistor"

for all of the elementary cells that form the whole transistor. This gives to the device not only

excellent power dissipation but also the suitability to be paralleled with similar devices.

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